Unofficial P1801 Work Group Home Page
This is the unofficial P1801 Work Group home page - not to be confused with the official IEEE P1801 Work Group page hosted by the IEEE-SA.
The prime reason for creating this website was to serve a single "goto" place for P1801 work group whose content could easily be maintained by the work group.
Unlike www.p1801.org which is public, this site is private to the P1801 working group - however anyone in the group can edit it and add new pages - please treat it like a wiki!
(BTW It was created from a free "Work Group" template in google sites and so are parts which have yet to be "commissioned")
The primary on-line presence of the P1801 work group is still (for legacy reasons) hosted by Accellera. It is implemented using "KAVI" and you can find the documentation here. Although KAVI can manage docs, calendars, action, track meeting minutes and attendance etc. we only use parts of the system as not everyone in the P1801 work group is an Accellera member and unfortunately the IEEE don't currently provide anything of similar functionality.
Issue Tracking is done by a Mantis system which is hosted by (again for legacy reasons) http://www.eda-stds.org. For reference the documentation is here and our work flow is outlined in this animated ppt
Lastly there is Google Apps which we use to develop collaborative documents, host websites (such as this one) and provide email reflectors for the subcommittees.
Links to all three of these on-line services (Accellera, Mantis, Google Docs) can be found in the side bar of every page in this website.
The scope as defined in the P1801 Project Authorisation Request (PAR):
"This standard establishes a format used to define the low power design intent for electronic systems and electronic intellectual property. The format provides the ability to specify the supply network, switches, isolation, retention and other aspects relevant to power management of an electronic system. The standard defines the relationship between the low power design specification and the logic design specification captured via other formats (e.g., standard hardware description languages)."
Details of the P1801 Work Group, subcommittee and F2F meetings can be found here